Reliability increment of onboard control complexes by means of lockstepped hardware voting majority frames construction at hardware synchronization of single-chip microcontrollers

1Yurchenko, Yu.B
1LTD RPI (Research and Production Enterprise) HARTRON-ARKOS, Kharkiv, Ukraine
Kosm. nauka tehnol. 2004, 10 ;(Supplement1):041-049
https://doi.org/10.15407/knit2004.01s.041
Publication Language: Russian
Abstract: 
Multi-channel fault-tolerant onboard computer frames of critical application have investigated. Decreasing latent fault detection time at usage hardware synchronization components of processes in channels have defined. Advantage of lockstepped hardware voting majority frames construction with interchannel compare components for control system on top of critical application have demonstrated
References: 

1. Afonin V. V., Liseikin V. A., Milyutin V. V., et al. Channel synchronization of the trended channels of a hard-wire PLC PLC. In: Industrial Automated Control Systems and Controllers, No. 6, 58-60 (2001) [in Russian].
2. Baida N. K., Krivonosov A. I., Lysenko I. V., et al. Evolution of fault-tolerant CCVCs and directions of their development on single-chip micro-computers. In: Processing Systems Information, Is. 4 (14), 217-225 (Kharkiv, 2001) [in Russian].
3. Burtsev V. Possibilities of using foreign element base in military systems. In: Living Electronics of Russia, 33-36 (2002) [in Russian].
4. Gobchansky O. P. Application of MICRO PC in special-purpose computer complexes. Sovr. Tekhnol. Avtomatiz., No. 1, 38-41 (1997) [in Russian].
5. Gobchansky O. P. Problems of creating on-board computing systems of small spacecraft. Sovr. Tekhnol. Avtomatiz., No. 4, 28-35 (2001) [in Russian].
6. Gobchansky O. P., Popov V. D., Nikolaev Yu. Improving the radiation resistance of industrial automation equipment as part of on-board equipment. Sovr. Tekhnol. Avtomatiz., No. 4, 36-40 (2001) [in Russian].
7. Krivonosov A. I., Kulakov A. A., Baida N. K., Kharchenko V. S., Blagodarny N. P. Structure algorithm organization and reliability models of reserved systems. Kosm. nauka tehnol., 1 (1), 74-79 (1995) [in Russian].
https://doi.org//10.15407/knit1995.01.074
8. Tyapchenko Yu., Bezrodnov V. PC onboard the manned space vehicle. Sovr. Tekhnol. Avtomatiz., No. 1, 34-37 (1997) [in Russian].
9. Wakerly J. Microcomputer Reliability Improvement Using Triple-Modular Redundancy. TIIJeR, 64 (6), 65-78 (1976) [in Russian].
https://doi.org//10.1109/PROC.1976.10239
10. Wensley J. H., Lamport L., Goldberg J., et al. SIFT: Design and Analysis of a Fault-Tolerant Computer for Aircraft Control. TIIJeR, 66 (10), 26-48 (1978) [in Russian].
https://doi.org//10.1109/PROC.1978.11114
11. Kharchenko V. S., Yurchenko Yu. B., Baida N. K. Implementation of projects of fault-tolerant on-board computers of spacecraft using electronic components INDUSTRY. In: Instrument-making technology, No. 1, 74-80 (2002) [in Russian].
12. Kharchenko V. S., Yurchenko Yu. B. Improving the fault tolerance of control systems based on majorized computer systems with hardware synchronization. In: Information and control systems on railway transport, No. 4, 122-123 (2001) [in Russian].
13. Caldwell D. W., Rennels D. A. FTSM: A Fault-Tolerant Spaceborne Microcontroller. Department of Computer Science, 4731 Boelter Hall University of California, Los Angeles, CA 90024. Available at: http: //www.chillarege.com/fastabstracts/ftcs98/382.html.
14. David Ph., Guidal Cl. Development of Fault Tolerant Computer System for the Hermes Space Shuttle. Fault-Tolerant Computing, 1993. FTCS-23. Digest of Papers, The Twenty- Third International Symposium on Aug. 1993, 641-646 (1993).
15. Hagbae Kim, Kang G. Shin Evaluation of Fault Tolerance Latency from Real-Time Application's Perspectives. IEEE Transactions on computers, 49 (1), 55-64 (2000).
https://doi.org//10.1109/12.822564
16. Harper R. E., Lala J. H. Fault-Tolerant Parallel Processor. Guidance, Control and Dynamics, 14 (3), 554-563 (1990).
https://doi.org//10.2514/3.20675
17. Available at: http://www.cpm.ru/product/stratus.
18. Kieckhafer R. M., Walter C. J., Finn A. M., et al. The MAFT Architecture for Distributed Fault Tolerance. IEEE Trans. Computers, 37 (4), 398-405 (1988).
https://doi.org//10.1109/12.2183
19. Melliar-Smith P. M., Schwartz R. L. Formal Specification and Mechanical Verification of SIFT. IEEE Trans. Computers, 31 (7), 616-630 (1982).
https://doi.org//10.1109/TC.1982.1676059
20. Nakamikawa T., Morita Yu., Yamaguchi Sh., et al. High performance fault tolerant computer and its fault recovery. Fault-Tolerant Systems, 1997: Proc. Pacific Rim International Symp., 2-6 (1997).
21. Powell D. Distributed Fault-Tolerance-Lessons from DELTA-4. IEEE Micro, 14 (1), 36-47 (1994).
https://doi.org//10.1109/40.259898
22. Powell D., Arlat J., Beus-Dukic L., et al. GUARDS: a generic upgradable architecture for real-time dependable systems. Parallel and Distributed Systems: IEEE Transactions, 10 (6), 580-599 (1999).
https://doi.org//10.1109/71.774908
23. Prager K., Vahey M., Farwell W., et al. A fault tolerant signal processing computer. Dependable Systems and Networks. DSN 2000: Proc. Inter. Conf. 2000, 169-174 (2000).
24. Roques R., Correge A., Boleat C. Fault-tolerant computer for the Automated Transfer Vehicle. Fault-Tolerant Computing, 1998. Digest of Papers. Twenty-Eighth Annual International Symp., 414-419 (1998).
25. Scott J. A., Preckshot G. G., Gallagher J. M. Using Commercial-Off-The-Shelf (COTS) Software in High-Consequence Safety Systems. Lawrence Livermore National Laboratory, UCRL122246. (1995).